DocumentCode
1801292
Title
Fault tolerant Lu factorization in transactional memory system
Author
Wei Song ; Jia Jia
Author_Institution
National Laboratory for Parallel and Distributed Processing, School of Computer, National University of Defense Technology, Changsha, 410073, China
fYear
2013
fDate
1-8 Jan. 2013
Firstpage
1
Lastpage
4
Abstract
With the popularization of multi-core processors, transaction memory, as a concurrent control mechanism with easy programing and high scalability, has attracted more and more attention. As a result, the reliability problems of transactional memory become a concerning issue. This paper addresses a transactional implementation of the Lu benchmark of SPLASH-2, and proposes a fault-tolerant Lu algorithm for this transactionalize Lu algorithm. The fault-tolerant Lu uses the data-versioning mechanism of the transactional memory system, detects errors based on transactions and recovers the error by rolling back the error transaction. The experiments show that the fault-tolerant Lu can get a better fault tolerance effect under a smaller cost.
Keywords
Computers; Fault tolerance; Fault tolerant systems; Hardware; Multicore processing; Software; Fault Tolerance; Lu; Transactional Memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Conference Anthology, IEEE
Conference_Location
China
Type
conf
DOI
10.1109/ANTHOLOGY.2013.6784788
Filename
6784788
Link To Document