• DocumentCode
    1802696
  • Title

    Design and implementation of multi-channel digital down-converter based on DSP

  • Author

    Huang, Bo

  • Author_Institution
    Sch. of Inf. Eng., Chongqing City Manage. Coll., Chongqing, China
  • Volume
    3
  • fYear
    2011
  • fDate
    24-26 Dec. 2011
  • Firstpage
    1846
  • Lastpage
    1850
  • Abstract
    Aiming at multi-channel IF signal processing requirements, the paper designed and implemented a multi-channel digital down-converter. Based on functional requirements and technical indexes, the implementation structure of multi-channel digital down-converter was designed and overall functional diagram was given. Functions and constitutes of each module within FPGA were described in detail. The test on function and performance of multi-channel digital down-converter system was conducted. Test method, flow and test result analysis were performed in sequence. After strict test, result shows that the digital down-converter can ensure normal and stable working of system, which can also achieve appropriate indexes.
  • Keywords
    analogue-digital conversion; digital signal processing chips; digital-analogue conversion; field programmable gate arrays; DSP; FPGA; functional diagram; functional requirement; multichannel IF signal processing requirement; multichannel digital down-converter structure; technical indexes; Attenuation; Clocks; Digital signal processing; Educational institutions; Indexes; Receivers; DSP; digital down-converter; multi-channel;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Science and Network Technology (ICCSNT), 2011 International Conference on
  • Conference_Location
    Harbin
  • Print_ISBN
    978-1-4577-1586-0
  • Type

    conf

  • DOI
    10.1109/ICCSNT.2011.6182329
  • Filename
    6182329