DocumentCode
1803298
Title
Power dissipation reductions with genetic algorithms
Author
Takahashi, Eiichi ; Murakawa, Masahiro ; Kasai, Yuji ; Higuchi, Tetsuya
Author_Institution
Adavanced Semicond. Res. Center, Tsukuba, Japan
fYear
2003
fDate
9-11 July 2003
Firstpage
111
Lastpage
116
Abstract
Two cases of power dissipation reduction with post-fabrication adjustment using genetic algorithms is introduced in this paper. The first is a 1GHz ALU implementation, where power consumption has been reduced by 54% through clock-timing adjustment. The second case is the IF (intermediate frequency) filter analog LSI used in cellular phones, where the reduction in power dissipation is realized by circuit parameter adjustment. The IF filter has been widely used in commercial cellular phones since 2001.
Keywords
adders; cellular radio; genetic algorithms; power consumption; power control; radiofrequency filters; 1GHz ALU implementation; IF filter; analog LSI; cellular phone; circuit parameter adjustment; clock-timing adjustment; genetic algorithm; intermediate frequency filter; large scale integration; postfabrication adjustment; power consumption reduction; power dissipation reduction; Cellular phones; Circuit testing; Clocks; Delay; Energy consumption; Filters; Genetic algorithms; Large scale integration; Power dissipation; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Evolvable Hardware, 2003. Proceedings. NASA/DoD Conference on
Print_ISBN
0-7695-1977-6
Type
conf
DOI
10.1109/EH.2003.1217654
Filename
1217654
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