• DocumentCode
    180424
  • Title

    Characterization of the High Frequency Performance of 28-nm UTBB FDSOI MOSFETs as a Function of Backgate Bias

  • Author

    Shopov, S. ; Voinigescu, S.P.

  • Author_Institution
    ECE Dept., Univ. of Toronto, Toronto, ON, Canada
  • fYear
    2014
  • fDate
    19-22 Oct. 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper describes for the first time the high frequency performance characterization of a production 28-nm ultra-thin-body-and-BOX (UTBB) fully-depleted (FD) SOI CMOS technology. The measured gm, fT, and maximum available gain (MAG) of fully-wired n-channel and p-channel MOSFETs are reported as a function of gate-source, drainsource, back-gate voltages and drain current density. It is shown that the back-gate bias can reduce the VGS at which the peak gm, peak fT and peak MAG occur by up to 400 mV and can flatten the fT-VGS characteristics, as needed in highly linear amplifiers. The peak gm/fT values of 1.5mS/μm/298GHz and 0.93mS/μm/194GHz, for n-MOSFETs and p-MOSFETs respectively, match or exceed those of 28-nm LP bulk and 45-nm SOI MOSFETs with identical layout geometry and metal stack wiring.
  • Keywords
    CMOS integrated circuits; MOSFET; silicon-on-insulator; UTBB FDSOI MOSFET; back gate voltages; backgate bias; drain current density; drain source; gate source; high frequency performance characterization; highly linear amplifiers; identical layout geometry; maximum available gain; metal stack wiring; ultra thin body and BOX fully depleted SOI CMOS technology; CMOS integrated circuits; CMOS technology; Current measurement; Layout; Logic gates; MOSFET; MOSFET circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compound Semiconductor Integrated Circuit Symposium (CSICs), 2014 IEEE
  • Conference_Location
    La Jolla, CA
  • Type

    conf

  • DOI
    10.1109/CSICS.2014.6978546
  • Filename
    6978546