Design of a Microprocessor Datapath Using Four-Valued Differential-Pair Circuits

New four-valued logic and static storage components using differential-pair circuits (DPCs) are proposed for a high-performance microprocessor datapath. The DPCbased circuit makes a signal-voltage swing small yet the current-driving capability large, and generates complementary outputs. Both a four-valued comparator and a binary static latch can be merged into a simple DPC-based circuit structure, which achieves low-power dissipation and small chip area while maintaining high-speed switching. As a typical application, a 32-bit microprocessor datapath with five pipelining stages is implemented using the proposed circuit technique in 0.18ìm CMOS, and its advantages are demonstrated in comparison with a corresponding CMOS implementation.