• DocumentCode
    1805892
  • Title

    Exploitation of Parallel Search Space Evaluation with FPGAs in Combinatorial Problems: The Eternity II Case

  • Author

    Malakonakis, Pavlos ; Dollas, Apostolos

  • Author_Institution
    Dept. of Electron. & Comput. Eng., Tech. Univ. of Crete, Chania, Greece
  • fYear
    2011
  • fDate
    5-7 Sept. 2011
  • Firstpage
    264
  • Lastpage
    268
  • Abstract
    The Eternity II puzzle is a combinatorial search problem which qualifies as a computational grand challenge. As no known closed form solution exists, its solution is based on exhaustive search, making it an excellent candidate for FPGA-based architectures, in which complex data structures and non-trivial recursion are implemented in hardware. This paper presents such an architecture, which was designed and fully implemented on a Virtex5 FPGA (XUP ML505 board). Despite the serial nature of the recursion, as parallelism can be applied with the initiation of multiple searches, the system shows a measured speedup of 2.6 vs. a high-end multi-core compute server.
  • Keywords
    combinatorial mathematics; field programmable gate arrays; logic design; search problems; Eternity II puzzle; Virtex5 FPGA; XUP ML505 board; combinatorial problem; combinatorial search; exhaustive search; parallel search space evaluation; Clocks; Computer architecture; Engines; Field programmable gate arrays; Hardware; Registers; Software;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications (FPL), 2011 International Conference on
  • Conference_Location
    Chania
  • Print_ISBN
    978-1-4577-1484-9
  • Electronic_ISBN
    978-0-7695-4529-5
  • Type

    conf

  • DOI
    10.1109/FPL.2011.53
  • Filename
    6044826