DocumentCode
1806133
Title
Embedding and Assembling Techniques for Spatial Computing Structure Design using Decision Trees and Diagrams
Author
Yanushkevich, S.N. ; Shmerko, V.P. ; Boulanov, O.R.
Author_Institution
University of Calgary, Canada
fYear
2006
fDate
17-20 May 2006
Firstpage
29
Lastpage
29
Abstract
An ideal match of a computational data structure and a topology happens once the structure is directly mapped into a physical layout. Nanotechnologies offer various topological structures in spatial dimensions. One of the problems arising from this variety is to "delegate" computing properties to these structures. A direct approach is to embed the data structure into a given topology. Decision trees (DTs) and diagrams (DDs) are candidate data structures with the ability to compute an arbitrary switching and multivalued functions. In this paper, we manipulate the topology of DTs and DDs in the iterative embedding process using the property of topological flexibility. We report our experimental results on application of algebraic (Spolynomials, after Stankovi´c) and graphical (Voronoi diagrams) structures to design and evaluate various topologies.
Keywords
Assembly; Circuit topology; Data structures; Decision trees; Embedded computing; Lattices; Logic functions; Molecular electronics; Physics computing; Tree data structures;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic, 2006. ISMVL 2006. 36th International Symposium on
ISSN
0195-623X
Print_ISBN
0-7695-2532-6
Type
conf
DOI
10.1109/ISMVL.2006.20
Filename
1623981
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