• DocumentCode
    1807688
  • Title

    A 5.5GS/s 28mW 5-bit flash ADC with resonant clock distribution

  • Author

    Ma, Wei-Hsiang ; Kao, Jerry C. ; Papaefthymiou, Marios

  • Author_Institution
    Univ. of Michigan, Ann Arbor, MI, USA
  • fYear
    2011
  • fDate
    12-16 Sept. 2011
  • Firstpage
    155
  • Lastpage
    158
  • Abstract
    A 65nm CMOS 5.5GS/s non-interleaved 5-bit flash ADC with resonant clocking is presented. An on-chip 0.77nH inductor resonates the entire clock distribution network to achieve energy-efficient operation. The ADC occupies 0.035mm2 and consumes 28mW when operating at 5.5GHz, yielding 396fJ per conversion step. The clock network dissipates only 10.7% of total power, consuming 54% lower energy over CV2. By comparison, in a typical flash ADC design, 30% of total power is clock-related. From measurement results, ENOB is 4.56b and 4.11b with fin at 440MHz and 2.04GHz, respectively.
  • Keywords
    analogue-digital conversion; clock distribution networks; low-power electronics; 5-bit flash ADC; clock distribution network; energy 396 fJ; frequency 2.04 GHz; frequency 440 MHz; frequency 5.5 GHz; on-chip inductor; power 28 mW; resonant clock distribution; size 65 nm; CMOS integrated circuits; Capacitance; Clocks; Inductors; Power demand; Synchronization; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ESSCIRC (ESSCIRC), 2011 Proceedings of the
  • Conference_Location
    Helsinki
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4577-0703-2
  • Electronic_ISBN
    1930-8833
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2011.6044888
  • Filename
    6044888