Verification of embedded system´s specification using collaborative simulation of SysML and simulink models

Author

Kawahara, Ryo ; Nakamura, Hiroaki ; Dotan, Dolev ; Kirshin, Andrei ; Sakairi, Takashi ; Hirose, Shinichi ; Ono, Kohichi ; Ishikawa, Hiroshi

Author_Institution

Tokyo Res. Lab., IBM Res., Yamato

fYear

2009

fDate

2-5 March 2009

Firstpage

21

Lastpage

28

Abstract

The authors propose an extension of SysML which enables description of continuous-time behavior. The authors also develop its execution tool integrated on Eclipse-based platform by exploiting co-simulation of SysML and MATLAB / Simulink. To demonstrate the effectiveness of the tool and the extension to SysML in verifying specifications of an embedded system, we create a sample model and analyze its execution results by checking constraints under a test case.

Keywords

digital simulation; embedded systems; formal specification; formal verification; specification languages; Eclipse based platform; SysML; collaborative simulation; constraint checking; continuous-time behavior; embedded system specification; execution tool; system verification; Binary decision diagrams; Collaboration; Connectors; Embedded system; Joining processes; MATLAB; Mathematical model; System testing; Systems engineering and theory; Unified modeling language;

fLanguage

English

Publisher

ieee

Conference_Titel

Model-Based Systems Engineering, 2009. MBSE '09. International Conference on

Conference_Location

Haifa

Print_ISBN

978-1-4244-2967-7

Electronic_ISBN

978-1-4244-2968-4

Type

conf

DOI

10.1109/MBSE.2009.5031716

Filename

5031716