A low open-loop gain, high-PSRR, micropower CMOS amplifier for mixed-signal applications

The design of a high power-supply-rejection ratio (PSRR), low open-loop gain, micropower amplifier stage is presented. Conventional amplifiers depend on high open-loop gain to provide PSRR, which either degrades their bandwidth of operation or requires power to preserve it. In contrast, the amplifier presented in this paper uses a differential topology and novel supply-noise attenuation techniques to achieve high PSRR at low open-loop gains. An experimental version of the amplifier provides over 90 dB of PSRR from both the positive and negative power supplies at low frequencies, achieves 300 kHz of bandwidth, an open-loop gain of 5, and consumes 3.3 μW in a 1.5 μm CMOS process. This topology is useful in low-power mixed-signal systems, where the PSRR provides immunity to power supply noise while the low open-loop gain allows amplification at a higher bandwidth per watt than is possible with moderate-gain or high-gain stages.