DocumentCode
1821805
Title
Power supply transient signal analysis under real process and test hardware models
Author
Singh, Abhishek ; Plusquellic, Jim ; Gattiker, Anne
Author_Institution
CSEE, Univ. of Maryland Baltimore County, MD, USA
fYear
2002
fDate
2002
Firstpage
357
Lastpage
362
Abstract
A device testing method called Transient Signal Analysis (TSA) is subjected to elements of a real process and testing environment in this paper. Simulation experiments are designed to determine the effects of process skew (obtained from measured parameters of a real process) on the accuracy of TSA in estimating path delays from power supply IDDT and VDDT waveforms. The circuit model is designed to test TSA under deep submicron process models that incorporate advanced parameters such as transistor Vt width dependencies. Modeling elements of a testing environment including the probe card are subsequently introduced as a means of evaluating the effects of tester measurement noise in an actual implementation.
Keywords
delay estimation; digital integrated circuits; equivalent circuits; integrated circuit testing; modelling; transient analysis; circuit model; deep submicron process models; device testing method; digital ICs; path delays; power supply IDDT waveforms; power supply VDDT waveforms; power supply transient signal analysis; probe card PCB; process skew; tester measurement noise; testing environment; Circuit simulation; Circuit testing; Delay effects; Delay estimation; Hardware; Power measurement; Power supplies; Propagation delay; Signal analysis; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2002. (VTS 2002). Proceedings 20th IEEE
Print_ISBN
0-7695-1570-3
Type
conf
DOI
10.1109/VTS.2002.1011165
Filename
1011165
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