FPGA implementation of an adaptive noise canceller with low signal distortion

Author

Subramaniam, Vijay K. ; Reddy, Visshwanth M. ; Rao, Sathyanarayana S.

Author_Institution

Dept. of Electr. & Comput. Eng., Villanova Univ., PA, USA

Volume

2

fYear

1999

fDate

24-27 Oct. 1999

Firstpage

1396

Abstract

The architecture of an adaptive noise canceller (ANC) with low signal distortion for implementation on a FPGA is discussed. The proposed ANC reduces the reverberation effect in the processed speech, by using an adaptive step size algorithm. It consists of two adaptive filters: a main filter (MF) and a sub-filter (SF). The step size for the main filter is adjusted based on the estimated input SNR by the sub filter. This paper addresses the selection of design parameters and trade-offs´ involved in real time implementation of the ANC on the FPGA obtained by Matlab simulations.

Keywords

adaptive filters; adaptive signal processing; digital filters; digital simulation; field programmable gate arrays; filtering theory; noise; reverberation; speech processing; ANC architecture; FPGA implementation; Matlab simulations; adaptive filters; adaptive noise canceller; adaptive step size algorithm; design parameters selection; estimated input SNR; low signal distortion; main filter; real time implementation; reverberation effect; speech processing; sub-filter; Additive noise; Convergence; Distortion; Field programmable gate arrays; Filters; Noise cancellation; Resonance light scattering; Reverberation; Signal to noise ratio; Speech processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems, and Computers, 1999. Conference Record of the Thirty-Third Asilomar Conference on

Conference_Location

Pacific Grove, CA, USA

ISSN

1058-6393

Print_ISBN

0-7803-5700-0

Type

conf

DOI

10.1109/ACSSC.1999.831935

Filename

831935