• DocumentCode
    1828700
  • Title

    Yield and productivity improvements through use of advanced dual plasma source for TSV reveal & wafer dicing applications

  • Author

    Barnett, Richard ; Thomas, Dave ; Griffiths, Hefin

  • fYear
    2011
  • fDate
    7-9 Dec. 2011
  • Firstpage
    585
  • Lastpage
    589
  • Abstract
    In summary, it is clear that the deep Si etch requirements for MEMS, through- silicon vias (TSV) , via reveal and dicing have significant common ground and the experience established in any of the fields becomes useful across the others. The Pegasus Rapier has provided many of the benefits needed by users of this technology, with their inception being generated by the relative needs of their complementary markets.
  • Keywords
    elemental semiconductors; etching; micromechanical devices; silicon; three-dimensional integrated circuits; wafer level packaging; MEMS; TSV reveal; deep Si etch requirement; dual plasma source; productivity improvement; through-silicon vias; wafer dicing application; yield improvement; Glass; ISO standards; Plasma sheaths; Silicon; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC), 2011 IEEE 13th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4577-1983-7
  • Electronic_ISBN
    978-1-4577-1981-3
  • Type

    conf

  • DOI
    10.1109/EPTC.2011.6184488
  • Filename
    6184488