• DocumentCode
    1830844
  • Title

    Performance Prediction for Reconfigurable Processor

  • Author

    Liu, Daofu ; Guo, Qi ; Chen, Tianshi ; Li, Ling ; Chen, Yunji

  • Author_Institution
    State Key Lab. of Comput. Archit., ICT, Beijing, China
  • fYear
    2012
  • fDate
    25-27 June 2012
  • Firstpage
    1352
  • Lastpage
    1359
  • Abstract
    As the Integrated Circuit (IC) process improves, the microprocessors become more and more complicated. Most microprocessors allow part of their important parameters to be reconfigured, such as the frequency, cache prefetch mechanism, and so on. Predicting the performance of reconfigurable processor is still an open question since the performance model needs to consider not only program characteristic, but also processor architecture parameters. In this paper, we propose a new performance prediction model for reconfigurable processor based on machine learning. We employ the M5P as base learners to gain better performance and custom an ensemble learner to get better accuracy. The experiment results show that the ensemble learner reduce the prediction error to 3% from 8%, which is the prediction of a single M5P learner. Furthermore, benefited from considering both program architecture independent characteristics and the architecture parameters, our model can not only predict the performance of the program under specific architecture, but also help to optimize processor´s architecture and scheduling processes.
  • Keywords
    cache storage; learning (artificial intelligence); microprocessor chips; performance evaluation; processor scheduling; reconfigurable architectures; IC process; M5P learner; base learner; cache prefetch mechanism; ensemble learner; integrated circuit process; machine learning; microprocessor frequency; prediction error; processor architecture optimization; processor architecture parameters; program architecture-independent characteristics; reconfigurable processor performance prediction model; scheduling process optimization; Accuracy; Analytical models; Architecture; Computer architecture; Machine learning; Microprocessors; Predictive models;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on
  • Conference_Location
    Liverpool
  • Print_ISBN
    978-1-4673-2164-8
  • Type

    conf

  • DOI
    10.1109/HPCC.2012.199
  • Filename
    6332335