• DocumentCode
    183112
  • Title

    A 75dB DR 50MHz BW 3rd order CT-ΔΣ modulator using VCO-based integrators

  • Author

    Young, B. ; Reddy, Karthikeyan ; Rao, Smitha ; Elshazly, Amr ; Anand, Tejasvi ; Hanumolu, Pavan Kumar

  • Author_Institution
    Oregon State Univ., Corvallis, OR, USA
  • fYear
    2014
  • fDate
    10-13 June 2014
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    A wide bandwidth, high sample rate 3rd order continuous-time ΔΣ modulator using VCO-based integrators is presented. Non-idealities caused by VCOs at the modulator frontend are addressed using both circuit- and architecture-level techniques. Fabricated in 65 nm CMOS, the prototype modulator operates at 1.28 GS/s and achieves a dynamic range of 75 dB, SNR of 71 dB in 50 MHz bandwidth, while consuming 38 mW of total power.
  • Keywords
    CMOS integrated circuits; delta-sigma modulation; voltage-controlled oscillators; 3rd order CT-ΔΣ modulator; CMOS process; VCO-based integrators; architecture-level techniques; circuit-level techniques; frequency 50 MHz; modulator frontend; power 38 mW; size 65 nm; Bandwidth; CMOS integrated circuits; Delays; Modulation; Signal to noise ratio; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits Digest of Technical Papers, 2014 Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4799-3327-3
  • Type

    conf

  • DOI
    10.1109/VLSIC.2014.6858395
  • Filename
    6858395
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=183112