Efficient methodologies to study the signal integrity of multi Gb/s interconnects and full system EMC

Author

Scogna, A. Ciccomanici ; Johns, D.P.

Author_Institution

CST of America Inc., Framingham, MA, USA

fYear

2009

fDate

17-21 Aug. 2009

Firstpage

274

Lastpage

279

Abstract

This paper presents modern simulation techniques for the signal integrity (SI) of high speed interconnects (HSI) and full system EMC analysis. Partial element equivalent circuit (PEEC) is effectively use for EM and SPICE simulation. Different test boards are studied and results are validated by comparing multiple numerical methods. Guidelines for a full channel analysis are also provided and system level EMC is also investigated by means of transmission line matrix (TLM) method.

Keywords

SPICE; electromagnetic interference; equivalent circuits; integrated circuit interconnections; numerical analysis; printed circuits; transmission line matrix methods; EM simulation; PCB; SPICE simulation; channel analysis; full system EMC; high-speed interconnects; interconnects; numerical methods; partial element equivalent circuit; signal integrity; transmission line matrix method; Analytical models; Circuit simulation; Circuit testing; Electromagnetic compatibility; Equivalent circuits; Guidelines; Integrated circuit interconnections; SPICE; Signal analysis; Transmission line matrix methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Electromagnetic Compatibility, 2009. EMC 2009. IEEE International Symposium on

Conference_Location

Austin, TX

Print_ISBN

978-1-4244-4266-9

Electronic_ISBN

978-1-4244-4058-0

Type

conf

DOI

10.1109/ISEMC.2009.5284557

Filename

5284557