Polymer interfacial adhesion in microelectronic assemblies

The performance requirements of future electronic packages create the need for transition from traditional wire bond connections to advanced technologies such as flip chip on laminate and direct chip attach. These high performance connections utilize a particulate reinforced structural epoxy (underfill) to adhere the chip to the package or board. The integrity of the underfill/silicon chip and underfill/substrate (ceramic or polymer laminates) interfaces are crucial for the reliability of these chip attach methods. This paper presents fracture-mechanics-based experimental and analytical techniques for quantitatively and reproducibly determining the adhesive performance of chip/underfill and polymer substrate/underfill interfaces. The results of the adhesion studies on underfill/passivated silicon and underfill/polymer coated FR4 board interfaces are presented. The effects of different underfill formulations, board coatings and chip passivation layers on underfill interfacial performance are discussed. These techniques can be employed to rapidly evaluate new materials and examine process modification impact on adhesive performance in a wide range of environments