• DocumentCode
    1835119
  • Title

    Thermal aware clock synthesis considering stochastic variation and correlations

  • Author

    Liu, Chunchen ; Chen, Ruei Xi ; Tan, Jichang ; Fan, Sharon ; Fan, Jeffrey ; Makki, Kia

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of California, San Diego, CA
  • fYear
    2008
  • fDate
    18-21 May 2008
  • Firstpage
    1204
  • Lastpage
    1207
  • Abstract
    In this paper, we have proposed a thermal aware routing based parameterization to generate a clock model that takes the stochastic temperature variation into consideration. The worst-case skew is calculated by using the transient analysis. The proposed Thermal Aware Routing based Clock Tree Optimization (TARCO) is performed level by level via the use of sensitivities from the proposed macromodel. The experimental results show that our algorithm reduces up to 5X worst-case skew in comparison to the existing bonded-skew based Deferred Merge Embedding (DME) approach, and 1.7X worst-case skew compared to Perturbation based Clock Optimization (PECO) and 2.1X compared to Temperature Aware Clocktree Optimization (TACO).
  • Keywords
    clocks; optimisation; transient analysis; trees (mathematics); clock tree optimization; deferred merge embedding approach; parameterization; stochastic correlations; stochastic temperature variation; stochastic variation; thermal aware clock synthesis; thermal aware routing; transient analysis; worst-case skew; Clocks; Delay effects; Merging; Routing; Stochastic processes; Temperature distribution; Temperature sensors; Thermal engineering; Topology; Transient analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    978-1-4244-1683-7
  • Electronic_ISBN
    978-1-4244-1684-4
  • Type

    conf

  • DOI
    10.1109/ISCAS.2008.4541640
  • Filename
    4541640