Design of a 17-million gate network processor using a design factory

Silicon Access Networks taped out in one year four high performance SoC products: a high-end network processor and three associated co-processors, providing the industry with the highest performance OC-192 Data Plane Processing solution. The four chips are shipping for revenue and went into production from first silicon with no mask change. They were designed using state-of-the-art 0.13μm technology and collectively represent about 750-million transistors, implementing a variety of analog, digital, high-speed memory and functional blocks. This contribution describes the design of the Packet Processor and some of the key aspects of Silicon Access Networks\´ design methodology that enabled to accomplish repeatable "first pass silicon" successes, despite system complexity challenges. The 175-million transistor iPP was simultaneously designed in three locations (San Jose/CA, Raleigh/NC, Ottawa/Canada). Bring-up and pre-production showed that first silicon met all its targets: power, speed, yield and complete functionality.