• DocumentCode
    1836172
  • Title

    Power emulation: Methodology and applications for HW/SW power optimization

  • Author

    Haid, J. ; Bachmann, C. ; Genser, A. ; Steger, C. ; Weiss, R.

  • Author_Institution
    Design Center Graz, Infineon Technol. Austria AG, Graz, Austria
  • fYear
    2010
  • fDate
    26-28 July 2010
  • Firstpage
    133
  • Lastpage
    138
  • Abstract
    Power profiling methods are indispensible in the power-aware design of HW/SW systems. By extending functional emulators with power estimation hardware, high-level power information can be derived during run-time, yielding a considerable speed-up as compared to simulation based approaches. A key enabler for the widespread use of the power emulation methodology is the automation of both power model creation and HDL adaptation. In this paper, we outline our system-level power emulation technique as well as its automatic power modeling and hardware adaptation. Furthermore, applications in the field of HW/SW power management are illustrated.
  • Keywords
    field programmable gate arrays; hardware description languages; hardware-software codesign; power aware computing; HDL adaptation; HW-SW power management; automatic power modeling; hardware adaptation; hardware software power optimization; high-level power information; power aware design; power estimation hardware; power model creation; power profiling method; system level power emulation technique; Adaptation model; Emulation; Estimation; Hardware; Power demand; Software; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods and Models for Codesign (MEMOCODE), 2010 8th IEEE/ACM International Conference on
  • Conference_Location
    Grenoble
  • Print_ISBN
    978-1-4244-7885-9
  • Electronic_ISBN
    978-1-4244-7886-6
  • Type

    conf

  • DOI
    10.1109/MEMCOD.2010.5558641
  • Filename
    5558641