DocumentCode
1838158
Title
Comprehensive cost-effective photo defect monitoring strategy
Author
Peterson, Ingrid ; Stoller, Meryl ; Gudmundsson, Dadi ; Nurani, Raman ; Ashkenaz, Scott ; Breaux, Louis
Author_Institution
KLA-Tencor Corp., Austin, TX, USA
fYear
2001
fDate
2001
Firstpage
67
Lastpage
70
Abstract
The latest technology advances and new processes in the lithography area coupled with the increasing market pressures have placed greater demands on defect management. Thinner resists, new resist chemistries and tighter process windows along with shorter product life cycles and the need for faster return on investment create the necessity to focus more attention to defectivity. Fabs must detect, identify and resolve defects in the lithography area before committing product wafers in order to be competitive. At present, the application of available advanced defect management technology in the lithography area has lagged compared to other areas in the semiconductor fab. Optimizing the defect management strategy with the large range of possible defect mechanisms and related yield impact that can occur within the lithography area is a relatively complicated task. With the variety of available defect inspection technologies, the capital and labor support costs associated with defect metrology and the ability to correct problems by rework, there is a need to approach the problem of defect management in, a systematic, manner to measure the cost effectiveness of the defect management strategy. In this paper the Sample Planner cost model was applied to the full range of available defect inspection technologies and sampling strategies based on the commonly known defect mechanisms that occur in the lithography area. From this a recommended optimum sampling and monitoring strategy was obtained
Keywords
inspection; integrated circuit economics; integrated circuit yield; manufacturing resources planning; photolithography; process monitoring; sampling methods; semiconductor process modelling; Sample Planner cost model; automated inspection; cost-effective photo defect monitoring strategy; defect inspection technologies; defect management; defect metrology; lithography area; macro defects; micro defects; optimum monitoring strategy; sampling strategies; semiconductor fab; yield improvement; yield loss mechanisms; Chemical technology; Chemistry; Costs; Inspection; Investments; Lithography; Monitoring; Resists; Sampling methods; Technology management;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing Symposium, 2001 IEEE International
Conference_Location
San Jose, CA
Print_ISBN
0-7803-6731-6
Type
conf
DOI
10.1109/ISSM.2001.962916
Filename
962916
Link To Document