Process-related instability mechanisms for the hydrogenated amorphous silicon thin film transistors

Author

Tai, Ya-Hsiang ; Su, F.C. ; Feng, M.S. ; Cheng, H.C.

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

1995

fDate

24-28 Oct 1995

Firstpage

730

Lastpage

732

Abstract

Thin film transistors (TFTs) with various hydrogen concentrations in the amorphous silicon (a-Si:H) films and different silicon nitride (SiN_x) gate compositions have been stressed with dc bias to realize the process-related device reliability. For the positive gate bias stress, the instability phenomena mainly come from the electron trapping in the SiN_x. On the other hand, for the negative gate bias stress, the hydrogen-enhanced state creation in the a-Si:H films due to the defect pool effect will be offset by the hole trapping in the SiN_x. Consequently, the reliability of the TFTs was improved by using the SiN_x gates with less trap sites and reducing the hydrogen concentration in the a-Si:H films,

Keywords

amorphous semiconductors; electron traps; elemental semiconductors; hole traps; hydrogen; semiconductor device reliability; silicon; silicon compounds; thin film transistors; Si:H-SiN; dc bias; defect pool effect; electron trapping; gate compositions; hole trapping; negative gate bias stress; positive gate bias stress; process-related device reliability; process-related instability mechanisms; thin film transistors; trap sites; Amorphous silicon; Distortion measurement; Electrodes; Electron traps; Etching; Hydrogen; Semiconductor films; Stress; Thin film transistors; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 1995 4th International Conference on

Conference_Location

Beijing

Print_ISBN

0-7803-3062-5

Type

conf

DOI

10.1109/ICSICT.1995.503542

Filename

503542