Effects of dummy patterns and substrate on spiral inductors for sub-micron RF ICs

Author

Jae-Hong Chang ; Yong-Sik Youn ; Hyun-Kyu Yu ; Choong-Ki Kim

Author_Institution

Dept. of Electron. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea

fYear

2002

fDate

3-4 June 2002

Firstpage

419

Lastpage

422

Abstract

In today´s sub-micron CMOS technologies, dummy patterns are necessary to obtain the desired metal density for uniform etching. This paper shows the effect of the dummy patterns on the quality factor of the inductor. The effects of the polysilicon ground shield and p-doped substrate on inductor performance have also been investigated. As the distance of between dummy and inductor is increased, the quality factor is less influenced by eddy current loss due to the dummy. Also we can achieve Q = 13 at 3 GHz and L = 6.05 nH using a patterned ground shield with slotted polysilicon layers in a commercial standard 0.18 /spl mu/m CMOS technology.

Keywords

CMOS integrated circuits; Q-factor; UHF integrated circuits; equivalent circuits; field effect MMIC; inductors; silicon; substrates; /spl Pi/-type inductor model; 0.18 micron; 3 GHz; Si; dummy patterns; eddy current loss; inductor Q-factor; inductor performance; p-doped substrate; polysilicon ground shield; quality factor; slotted polysilicon layers; submicron CMOS technologies; uniform etching; CMOS process; CMOS technology; Conductivity; Eddy currents; Inductance; Inductors; Q factor; Radio frequency; Silicon; Spirals;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE

Conference_Location

Seattle, WA, USA

ISSN

1529-2517

Print_ISBN

0-7803-7246-8

Type

conf

DOI

10.1109/RFIC.2002.1012081

Filename

1012081