• DocumentCode
    1839625
  • Title

    Trade-offs between CMOS and BiCMOS

  • Author

    Nagano, Takeshi

  • Author_Institution
    Semicond. Dev. Center, Hitachi Ltd.
  • fYear
    1995
  • fDate
    24-28 Oct 1995
  • Firstpage
    763
  • Lastpage
    767
  • Abstract
    This paper describes CMOS/BiCMOS trade-offs for deep sub-micron regime operating at less than 3 V. Advantages of CMOS compatible BiCMOS for high-frequency microprocessors and static random access memories are demonstrated
  • Keywords
    BiCMOS digital integrated circuits; VLSI; integrated circuit technology; technological forecasting; 3 V; CMOS/BiCMOS trade-offs; deep sub-micron regime; high-frequency microprocessors; static random access memories; BiCMOS integrated circuits; CMOS technology; Circuit optimization; Cutoff frequency; Electrodes; Inverters; MOS devices; Microprocessors; Power supplies; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology, 1995 4th International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    0-7803-3062-5
  • Type

    conf

  • DOI
    10.1109/ICSICT.1995.503552
  • Filename
    503552
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1839625