On the stability of input-buffer cell switches with speed-up

Author

Marsan, M. Ajmone ; Leonardi, E. ; Mellia, M. ; Neri, E.

Author_Institution

Dipt. di Elettronica, Politecnico di Torino, Italy

Volume

3

fYear

2000

fDate

26-30 Mar 2000

Firstpage

1604

Abstract

We consider cell-based switch architectures, whose internal switching matrix does not provide enough speed to avoid input buffering. These architectures require a scheduling algorithm to select at each slot a subset of input buffered cells which can be transferred towards output ports. The stability properties of several classes of scheduling algorithms are studied in the paper, using analytical techniques mainly based upon Lyapunov functions. Original stability conditions are derived for some scheduling algorithms that are being used today in high-performance switch architectures

Keywords

Lyapunov methods; buffer storage; scheduling; stability; telecommunication switching; Lyapunov functions; cell-based switch architectures; high-performance switch architectures; input-buffer cell switches; internal switching matrix; scheduling algorithm; speed-up; stability; Asynchronous transfer mode; Buffer storage; Computer architecture; Fabrics; IP networks; Lyapunov method; Packet switching; Scheduling algorithm; Stability analysis; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

INFOCOM 2000. Nineteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Proceedings. IEEE

Conference_Location

Tel Aviv

ISSN

0743-166X

Print_ISBN

0-7803-5880-5

Type

conf

DOI

10.1109/INFCOM.2000.832559

Filename

832559