A complete pipelined MMSE detection architecture in a 4x4 MIMO-OFDM receiver

This paper presents a VLSI architecture of MMSE detection in a 4 x 4 MIMO-OFDM receiver. Packet-based MIMO- OFDM imposes a considerable throughput requirement on the matrix inversion because of strict timing in frame structure and subcarrier-by-subcarrier basis processing. Pipeline processing oriented algorithms are preferable to tackle this issue. We adopt Strassen´s algorithms of matrix inversion and multiplication to circuit design in the MMSE detection. The complete pipelined architecture achieves real-time operation which does not depend on numbers of subcarriers. The designed circuit has been implemented to a 90-nm CMOS process and shows a potential for providing a 2.6-Gbps transmission speed in a 160-MHz signal bandwidth.issue.