On the Deembedding of RF High Power Transistor Parameters

RF high power bipolar transistors are usually configured with the collector at the bottom of the device. In practice the transistor is mounted on a substrate for characterization. The classical methods developed for the ¿ on wafer¿ CV and AC measurement of grounded devices are then no longer applicable. A (general) deembedding algorithm is presented in which the medium surrounding the transistor is taken to be a generic five port and the transistor is treated as a floating twoport. Using this approach, one can model a wide variety of configurations, including coupled lines, bondwire complexes with mutual coupling, vias and packages enabling one pass deembedding. Use of this algorithm facilitates an integrated approach improving accuracy and speed. Implementation of the five port algorithm in IC-CAP and its application to high frequency power transistor modeling will be described.