DocumentCode

1843431

Title

Processor-Time Tradeoffs for Cayley Graph Interconnection Networks

Author

Baumslag, Marc ; Rosenberg, Arnold L.

Author_Institution

University of Massachusetts

fYear

1991

fDate

28 Apr-1 May 1991

Firstpage

630

Lastpage

636

Keywords

Computer networks; Degradation; Emulation; Fault tolerance; Hardware; Hypercubes; Information science; Multiprocessor interconnection networks; Routing;

fLanguage

English

Publisher

ieee

Conference_Titel

Distributed Memory Computing Conference, 1991. Proceedings., The Sixth

Print_ISBN

0-8186-2290-3

Type

conf

DOI

10.1109/DMCC.1991.633348

Filename

633348