Modifying shared-memory ATM switches structure to increase switching speed

One of the most common applications of shared-memory switches is multicast traffic sending with minimum rate deletion of received packet, due to congestion in switch. Various structures and algorithms have been presented for these switches and ¿address copy¿ is one of them already known as the best. However, this structure reduces either packet elimination rate and hardware use, but it has its own disadvantages. In this paper, we proposed a new method for address copy structure switches which increases switching speed considerably. Results of applying proposed method to a real scenario show more than 10% switch speed increasing by reducing total accesses to memory.