DocumentCode
1849336
Title
The FPGA challenge
Author
Vranesic, Zvonko G.
Author_Institution
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
fYear
1998
fDate
27-29 May 1998
Firstpage
121
Lastpage
126
Abstract
Examines some key issues in the development of field-programmable gate arrays (FPGAs). Design factors that determine the performance and effectiveness of these devices are discussed. The main emphasis is on the structure of logic blocks and interconnection resources. Potential areas for application of multiple-valued logic techniques are considered
Keywords
field programmable gate arrays; logic design; multivalued logic; field-programmable gate arrays; interconnection resources; logic blocks; multiple-valued logic techniques; Application software; Digital systems; Field programmable gate arrays; Integrated circuit interconnections; Logic design; Logic devices; Programmable logic devices; Switches; Table lookup; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic, 1998. Proceedings. 1998 28th IEEE International Symposium on
Conference_Location
Fukuoka
ISSN
0195-623X
Print_ISBN
0-8186-8371-6
Type
conf
DOI
10.1109/ISMVL.1998.679318
Filename
679318
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