DocumentCode
1851763
Title
A CMOS continuous-time FPAA analog core using automatically-tuned MOS resistors
Author
Yasunari, Jun ; Inoue, Takahiro ; Tsuneda, Akio
Author_Institution
Dept. of Electr. & Comput. Sci., Kumamoto Univ., Japan
Volume
1
fYear
2004
fDate
25-28 July 2004
Abstract
In this paper, a novel CMOS analog core for continuous-time FPAAs (field programmable analog arrays) is proposed. The proposed analog core consists of CMOS opamps and automatically-tuned MOS resistors. Since MOS resistor values are fixed by a PLL (phase locked loop) technique, the MOS resistors are almost immune to temperature variations and fabrication tolerances. In this analog core, the MOS resistors not only act as linear resistors but also as analog switches.
Keywords
CMOS analogue integrated circuits; circuit tuning; field programmable analogue arrays; integrated circuit design; operational amplifiers; phase locked loops; resistors; switches; CMOS continuous time FPAA analog core; CMOS opamps; PLL; analog switches; automatically tuned MOS resistors; field programmable analog arrays; integrated circuit design; linear resistors; phase locked loop; Circuit simulation; Field programmable analog arrays; Frequency; Large scale integration; MOSFETs; Phase locked loops; Resistors; Switches; Switching circuits; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on
Print_ISBN
0-7803-8346-X
Type
conf
DOI
10.1109/MWSCAS.2004.1353920
Filename
1353920
Link To Document