DocumentCode
1852753
Title
A solenoidal basis method for efficient inductance extraction
Author
Mahawar, Hemant ; Sarin, Vivek ; Shi, Weiping
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear
2002
fDate
2002
Firstpage
751
Lastpage
756
Abstract
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction is the solution of large, dense, complex linear systems of equations via iterative methods. Accelerating the convergence of the iterative method through preconditioning is made difficult due to the non-availability of the system matrix. This paper presents a novel algorithm to solve these linear systems by restricting current to a discrete solenoidal subspace in which Kirchoff´s law is obeyed, and solving a reduced system via an iterative method such as GMRES. A preconditioner based on the Green´s function is used to achieve near-optimal convergence rates in several cases. Experiments on a number of benchmark problems illustrate the advantages of the proposed method over FastHenry.
Keywords
Green´s function methods; VLSI; circuit CAD; inductance; integrated circuit design; integrated circuit interconnections; iterative methods; network routing; timing; GMRES; Green´s function; Kirchoff´s law; VLSI; benchmark problems; complex linear systems; discrete solenoidal subspace; inductance extraction; interconnect; iterative methods; near-optimal convergence rates; parasitic inductance; preconditioner; preconditioning; solenoidal basis method; system matrix; timing verification; Acceleration; Equations; Green´s function methods; Inductance; Integrated circuit interconnections; Iterative algorithms; Iterative methods; Linear systems; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2002. Proceedings. 39th
ISSN
0738-100X
Print_ISBN
1-58113-461-4
Type
conf
DOI
10.1109/DAC.2002.1012723
Filename
1012723
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