DocumentCode
1853269
Title
Exploiting capacitance in high-performance computer systems
Author
Chow, Alex ; Hopkins, David ; Drost, Robert ; Ho, Ron
Author_Institution
Sun Microsyst. Labs., Menlo Park, CA
fYear
2008
fDate
23-25 April 2008
Firstpage
55
Lastpage
58
Abstract
Aggressive scaling of transistor feature sizes has enabled unprecedented levels of integration and corresponding performance improvements in VLSI systems. However, fabrication costs present barriers to continued growth in transistor density. Proximity Communication breaks these barriers by providing high-density, high-bandwidth, low-power, and scalable off-chip I/O, allowing designers to partition their designs into separate chips with significantly reduced performance penalties. This partitioning greatly improves chip and package yield, and enables modular assemblies of heterogeneous systems with customizable mixes of functional units tailored for specific end-user applications.
Keywords
VLSI; microcomputers; VLSI systems; aggressive scaling; capacitance exploitation; fabrication cost; heterogeneous systems; high-performance computer systems; performance improvements; proximity communication; transistor density; transistor feature size scaling; Bandwidth; Capacitance; Clocks; Costs; High performance computing; Microprocessors; Moore´s Law; Power generation economics; System performance; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on
Conference_Location
Hsinchu
Print_ISBN
978-1-4244-1616-5
Electronic_ISBN
978-1-4244-1617-2
Type
conf
DOI
10.1109/VDAT.2008.4542411
Filename
4542411
Link To Document