DocumentCode
1854497
Title
A self-testing and calibration technique for current-steering DACs
Author
Ma, Yuan Lang ; Huang, Jiun Lang
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
fYear
2008
fDate
23-25 April 2008
Firstpage
295
Lastpage
298
Abstract
In this paper, a current-steering DAC self-testing and calibration technique is proposed. In the proposed scheme, the lower bits of the DAC are duplicated and an analog comparator is added to facilitate self-testing and calibration. In self- testing mode, the controller executes the self-testing algorithm to characterize the DAC higher bits and computes the calibration information. In function mode, it produces the inputs to the duplicated lower bits for calibration. To validate the idea, a 14-bit prototype has been fabricated using TSMC 0.35 mum technology. The measurement results show that INL, DNL, and SFDR are significantly improved.
Keywords
automatic testing; calibration; digital-analogue conversion; analog comparator; calibration technique; current-steering DAC; self testing; Built-in self-test; Calibration; Circuit testing; Decoding; Digital signal processing; Digital-analog conversion; Fuses; Prototypes; Signal processing algorithms; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on
Conference_Location
Hsinchu
Print_ISBN
978-1-4244-1616-5
Electronic_ISBN
978-1-4244-1617-2
Type
conf
DOI
10.1109/VDAT.2008.4542471
Filename
4542471
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