A 10Gbase Ethernet transceiver (LAN PHY) in a 1.8 V, 0.18 μm SOI/CMOS technology

Author

Yoshimura, Tsutomu ; Ueda, Kimio ; Takasoh, Jun ; Wada, Yoshiki ; Oka, Toshihide ; Kondoh, Harufusa ; Chiba, Osamu ; Azekawa, Yoshihumi ; Ishiwaki, Masahiko

Author_Institution

Syst. LSI Dev. Center, Mitsubishi Electr. Corp., Itami, Japan

fYear

2002

fDate

2002

Firstpage

355

Lastpage

358

Abstract

In this paper, we present a 10Gbase Ethernet Transceiver that is suitable for the 10 Gbit Ethernet applications. The 10Gbase Ethernet transceiver LSI, which contains the high-speed interface and the fully integrated IEEE 802.3ae compliant logic, is fabricated in a 0.18 μm SOI/CMOS process and dissipates about 2.9 W at 1.8 V supply. By incorporating the monolithic approach and the use of an advanced CMOS process, this 10GE transceiver realizes the low power, low cost and compact solutions for the exponential need of broadband network applications.

Keywords

CMOS digital integrated circuits; VLSI; high-speed integrated circuits; local area networks; low-power electronics; silicon-on-insulator; transceivers; 0.18 micron; 1.8 V; 10 Gbit/s; 10Gbase Ethernet transceiver; 2.9 W; SOI/CMOS technology; Si; advanced CMOS process; broadband network applications; fully integrated IEEE 802.3ae compliant logic; high-speed interface; low power implementation; monolithic approach; Broadband communication; CMOS logic circuits; CMOS process; CMOS technology; Costs; Ethernet networks; Large scale integration; Local area networks; Physical layer; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002

Print_ISBN

0-7803-7250-6

Type

conf

DOI

10.1109/CICC.2002.1012840

Filename

1012840