DocumentCode
1855885
Title
Yet another low-voltage four quadrant analog CMOS multiplier
Author
Ramirez-Angulo, Jaime
Author_Institution
Klipsch Dept. of Electr. & Comput. Eng., New Mexico State Univ., Las Cruces, NM
Volume
1
fYear
1995
fDate
13-16 Aug 1995
Firstpage
405
Abstract
A novel implementation of a CMOS multiplier is presented. The circuit operates with ±1.65 V supply voltages with ±1 V input signal swing and has a 50 MHz constant bandwidth. SPICE simulations with 1.2 μm CMOS parameters are shown that verify the operation of the circuit
Keywords
CMOS analogue integrated circuits; analogue multipliers; -1.65 V; 1.2 micron; 1.65 V; 50 MHz; LV type; analog CMOS multiplier; four quadrant multiplier; low-voltage operation; Attenuation; Bandwidth; Batteries; Circuit simulation; Computational modeling; Impedance; Mirrors; SPICE; Virtual colonoscopy; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location
Rio de Janeiro
Print_ISBN
0-7803-2972-4
Type
conf
DOI
10.1109/MWSCAS.1995.504462
Filename
504462
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