DocumentCode
1858213
Title
Reducing cost and ensuring on-time delivery of hybrid-WSI massively parallel computing modules
Author
Habiger, C.M. ; Lea, R.M.
Author_Institution
Aspex Microsyst. Ltd., Brunel Univ., Uxbridge, UK
fYear
1994
fDate
19-21 Jan 1994
Firstpage
218
Lastpage
227
Abstract
Hybrid-WSI technologies offer an attractive implementation route for Massively Parallel Computing (MPC) Modules. However, cost and, especially, delivery problems, still associated with these technologies make MPC manufacturers wary. Uncertainties are mainly caused by limited individual die yields, and loss of good die during the mounting and bonding processes. Although significant research effort is aimed at supplying “known-good-die” and die yields can be expected to improve in the near future, these are likely to be superseded by increased levels of integration. This paper demonstrates how redundancy and reconfiguration can offer a solution to the problem and ensure on-time delivery while reducing the production cost of hybrid-WSI MPC modules significantly
Keywords
VLSI; multichip modules; parallel architectures; redundancy; MCMs; bonding processes; delivery problems; die yields; good die; hybrid-WSI massively parallel computing modules; mounting; production cost; reconfiguration; redundancy; Bonding processes; Costs; Delay; Manufacturing; Packaging; Parallel processing; Production; Redundancy; Uncertainty; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Wafer Scale Integration, 1994. Proceedings., Sixth Annual IEEE International Conference on
Conference_Location
San Francisco, CA
Print_ISBN
0-7803-1850-1
Type
conf
DOI
10.1109/ICWSI.1994.291250
Filename
291250
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