Reliable Network-on-Chip Router for Crosstalk and Soft Error Tolerance

With the shrink of the technology into nanometer scale, network-on-chip (NOC) has becoming a reasonable solution for connecting plenty of IP blocks on a single chip. But it suffers from both crosstalk and SEU errors, which affect its proper function. Therefore, it is desirable to design a reliable NOC under acceptable overhead. In this paper, an SCAC-TMR scheme is provided for NOC design, which maps data into selected crosstalk avoidance code (SCAC) for message transmission and preserves state and controlling registers of routers with triple modular redundancy (TMR). This scheme can avoid large crosstalk-induced delay in GHz circuits, because SCAC forbids relevant signal transitions on channels. Besides, due to low power dissipation of SCAC, routers of this scheme consume lower power. Experimental result shows that this scheme can save nearly 18% area overhead and 31% power dissipation compared with former method.