• DocumentCode
    1858966
  • Title

    Design and implementation of test harness for device drivers in SOC on mobile platforms

  • Author

    Arora, Harsh ; Jaliminche, Lokesh N.

  • Author_Institution
    Sch. of Comput. Sci. & Eng., Vellore Inst. of Technol., Vellore, India
  • fYear
    2015
  • fDate
    8-10 Jan. 2015
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Modern SOCs are comprised of a wide range of modules, such as microprocessor cores, memories, peripherals, and customized components, relevant to the targeted application. Testing external peripherals is easy, but testing Embedded peripherals in SOC is challenging task. In order to efficiently carry out design verification of peripheral cores, it is necessary to evaluate device under test with functional coverage metrics. The overall process can be divided in to two closely correlated phases mainly module configuration and module operation. The first one configures the peripheral on the different operation modes, the second one is responsible for exciting the whole device and observing its behavior. In the current work, we propose to develop a test harness for DMA controller and High Speed Synchronous Serial Interface. This proposed test harness can be used for stimulating the distinct functionalities of device under test as well as used for behavioral analysis. We have developed test drivers which can be exploited for testing by adding suitable observability features. Experimental results are provided with suitable functional test coverage to evaluate effectiveness of this test harness.
  • Keywords
    design for testability; device drivers; embedded systems; microprocessor chips; peripheral interfaces; system-on-chip; DMA controller; SOC; behavioral analysis; device drivers; embedded peripherals; external peripherals; high speed synchronous serial interface; microprocessor cores; peripheral cores; system-on-chip; test drivers; test harness; Instruction sets; Presses; Read only memory; Registers; System-on-chip; DMA Controller; Device Under Test (DUT); High Speed Synchronous Serial Interface (HSI); Stimuli generation; Test Harness; Test driver;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), 2015 International Conference on
  • Conference_Location
    Bangalore
  • Print_ISBN
    978-1-4799-7925-7
  • Type

    conf

  • DOI
    10.1109/VLSI-SATA.2015.7050470
  • Filename
    7050470