An interleaving energy-conservation mode (IECM) control in single-inductor dual-output (SIDO) step-down converters with 91% peak efficiency

Author

Lee, Yu-Huei ; Chen, Ke-Horng ; Lin, Ying-Hsi ; Yang, Yao-Yi ; Wang, Shih-Jung ; Chen, Yi-Kuang ; Huang, Chen-Chih

Author_Institution

Inst. of Electr. & Control Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2010

fDate

16-18 June 2010

Firstpage

57

Lastpage

58

Abstract

This interleaving energy-conservation mode control for single-inductor dual-output converter uses the superposition technique to yield the optimal average inductor current and 91% peak efficiency. Neither a freewheel stage nor a post-regulator is needed at nominal conditions. The output voltage ripple appears notably minimized over 50% by means of current interleaving at full load. The chip occupies 1.44 mm² in 65 nm CMOS and integrates with a 3D architecture for ultra-wide band system.

Keywords

CMOS integrated circuits; inductors; power convertors; CMOS; IECM control; SIDO step-down converter; inductor current; interleaving energy-conservation mode; peak efficiency; single-inductor dual-output converter; size 65 nm; superposition technique; ultra-wide band system; Converters; Electronic countermeasures; Inductors; Semiconductor device measurement; Solid state circuits; Switches; Three dimensional displays;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits (VLSIC), 2010 IEEE Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

978-1-4244-5454-9

Type

conf

DOI

10.1109/VLSIC.2010.5560272

Filename

5560272