• DocumentCode
    18661
  • Title

    Radix-4 and Radix-8 Booth Encoded Multi-Modulus Multipliers

  • Author

    Muralidharan, Ramal ; Chip-Hong Chang

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • Volume
    60
  • Issue
    11
  • fYear
    2013
  • fDate
    Nov. 2013
  • Firstpage
    2940
  • Lastpage
    2952
  • Abstract
    Novel multi-modulus designs capable of performing the desired modulo operation for more than one modulus in Residue Number System (RNS) are explored in this paper to lower the hardware overhead of residue multiplication. Two multi-modulus multipliers that reuse the hardware resources amongst the modulo 2n-1, modulo 2n and modulo 2n+1 multipliers by virtue of their analogous number theoretic properties are proposed. The former employs the radix- 22 Booth encoding algorithm and the latter employs the radix- 23 Booth encoding algorithm. In the proposed radix- 22 and radix- 23 Booth encoded multi-modulus multipliers, the modulo-reduced products for the moduli 2n-1, 2n and 2n+1 are computed successively. With the basis of the radix- 22 Booth encoded modulo 2n+1 and radix- 23 Booth encoded modulo 2n-1 and modulo 2n+1 multiplier architectures, new Booth encoded modulo 2n multipliers are proposed to maximally share the hardware resources in the multi-modulus architectures. Our experimental results on {2n-1,2n,2n+1} based RNS multiplication show that the proposed radix- 22 and radix- 23 Booth encoded multi-modulus multipliers save nearly 60% of area over the corresponding single-modulus multipliers. The proposed radix- 22 and radix- 23 Booth encoded multi-modulus multipliers increase the delay of the corresponding single-modulus multipliers by 18% and 13%, respectively in the worst case. Compared to the single-modulus multipliers, the proposed multi-modulus multipliers incur a minor power dissipation penalty of 5%.
  • Keywords
    encoding; multiplying circuits; residue number systems; RNS; hardware overhead; hardware resources; minor power dissipation penalty; modulo operation; modulo-reduced products; multimodulus multipliers; radix-4 booth encoding; radix-8 booth encoding; residue multiplication; residue number system; single-modulus multipliers; Booth algorithm; multi-modulus architectures; multiplier; residue number system (RNS);
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2013.2252642
  • Filename
    6497540