Cu via process optimization by electro-migration estimation testing

For Cu interconnects technology, the effects of barrier thickness and process optimizations are very important to electro-migration (EM) reliability. The microstructure of Cu electrochemical plating is highly with respect to characteristic of underlying barrier and Cu seed layers. Non-enough barrier thickness, we found early failure in single via test structure degrading EM lifetime. Furthermore, significant occur void formation site induce poor EM lifetime from non-optimized barrier deposition process. We conducted failures analyses and studied failure root causes. From investigation results, both failure analyses and generation mechanism are reported.