High performance 25 nm FDSOI devices with extremely thin silicon channel

Author

Krivokapic, Z. ; Maszara, W. ; Arasnia, F. ; Paton, E. ; Kim, Y. ; Washington, L. ; Zhao, E. ; Chan, J. ; Zhang, J. ; Marathe, A. ; Lin, M.R.

Author_Institution

Technol. Res. Group, AMD, Sunnyvale, CA, USA

fYear

2003

fDate

10-12 June 2003

Firstpage

131

Lastpage

132

Abstract

We demonstrate 25 nm mid-gap metal gate fully-depleted silicon on insulator (FDSOI) devices with the highest reported drive current for a single-gate PMOS device (I/sub on/=789 /spl mu/A//spl mu/m and I/sub off/=27 nA//spl mu/m for V/sub gs/-V/sub t/=1.25 V). We observe electron and hole mobility degradation for very thin channels (/spl sim/7 nm). Devices show good hot carrier and gate dielectric reliability.

Keywords

MOSFET; electron mobility; elemental semiconductors; hole mobility; hot carriers; semiconductor device reliability; semiconductor thin films; silicon; silicon-on-insulator; 25 nm; Si; drive current; electron mobility; gate dielectric reliability; hole mobility degradation; hot carrier; mid-gap metal gate fully depleted silicon on insulator; single-gate PMOS device; thin silicon channel; Charge carrier processes; Degradation; Dielectrics; Electron mobility; Hot carriers; MOS devices; Silicon; Stress; Thickness control; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on

Conference_Location

Kyoto, Japan

Print_ISBN

4-89114-033-X

Type

conf

DOI

10.1109/VLSIT.2003.1221120

Filename

1221120