DocumentCode
1868071
Title
Dynamics of threshold voltage instability in stacked high-k dielectrics: role of the interfacial oxide
Author
Pantisano, L. ; Cartier, E. ; Kerber, A. ; Degraeve, R. ; Lorenzini, M. ; Rosmeulen, M. ; Groeseneken, G. ; Maes, H.E.
Author_Institution
IMEC, Leuven, Belgium
fYear
2003
fDate
10-12 June 2003
Firstpage
163
Lastpage
164
Abstract
In this paper, we focus on comparing the V/sub TH/-instability in scaled stacks with the trapping behavior of thick HfO/sub 2/ layers. We show that a large part of the instability is caused by charging/discharging of HfO/sub 2/ bulk defects, independent of the HfO/sub 2/ thickness. The interfacial oxide thickness influence the mechanism of charging and discharging of the HfO/sub 2/ defects.
Keywords
crystal defects; electron traps; field effect transistors; hafnium compounds; thin film transistors; HfO/sub 2/; HfO/sub 2/ charging; HfO/sub 2/ defects; HfO/sub 2/ discharging; interfacial oxide; interfacial oxide thickness; scaled stacks; stacked dielectric materials; thick HfO/sub 2/ layers; threshold voltage instability dynamics; trapping properties; Current measurement; Electron traps; FETs; Hafnium oxide; High-K gate dielectrics; Pulse measurements; Space vector pulse width modulation; Stress; Threshold voltage; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
4-89114-033-X
Type
conf
DOI
10.1109/VLSIT.2003.1221136
Filename
1221136
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