• DocumentCode
    187565
  • Title

    Correlation of BTI induced device parameter degradation and variation in scaled Metal Gate / High-k CMOS technologies

  • Author

    Kerber, Andreas ; Nigam, Tanya

  • Author_Institution
    Reliability Eng., GLOBALFOUNDRIES Inc., Malta, NY, USA
  • fYear
    2014
  • fDate
    1-5 June 2014
  • Abstract
    The correlation between time-zero device parameter and BTI induced parameter degradation is studied in detail. The device overdrive remains the dominant factor in the ΔIdsat for ultra-narrow logic gates while ΔVTlin shows a weak but measurable correlation to the time-zero value. The correlation has an impact on the σ-values of VTlin for stressed devices and should be considered for more accurate circuit aging simulations.
  • Keywords
    CMOS logic circuits; logic gates; BTI induced device parameter degradation correlation; circuit aging simulation; scaled metal gate-high-k CMOS technology; time-zero device parameter; ultranarrow logic gate; Correlation; Degradation; Integrated circuit modeling; Logic gates; Metals; Stress; Threshold voltage; BTI variability; CMOS; SRAM; high-k dielectrics; metal gate;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2014 IEEE International
  • Conference_Location
    Waikoloa, HI
  • Type

    conf

  • DOI
    10.1109/IRPS.2014.6861102
  • Filename
    6861102
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=187565