DocumentCode
1881313
Title
Evaluation technique of gate oxide damage
Author
Uraoka, Y. ; Eriguchi, K. ; Tamaki, T. ; Tsuji, K.
Author_Institution
Matsushita Electric Ind. Co. Ltd., Osaka, Japan
fYear
1993
fDate
22-25 Mar 1993
Firstpage
149
Lastpage
154
Abstract
Gate oxide damage by the plasma process is studied using test structures with various length antennas. It is shown that the gate oxide damage by the plasma process can be monitored quantitatively by measuring the charge to breakdown Q BD. From Q BD measurements, it is found that degradation occurs in the duration of over-etching, not in main etching. The breakdown spot in the gate oxide is detected by the photon emission method. The breakdown caused by plasma damage occurs at the local oxidation of silicon (LOCOS) edge. LOCOS structure plays an important role for the degradation by plasma damage
Keywords
MOS integrated circuits; electric breakdown of solids; etching; insulated gate field effect transistors; integrated circuit testing; oxidation; LOCOS structure; charge to breakdown; gate oxide damage; local oxidation of silicon; over-etching; photon emission method; plasma process; test structures; Antenna measurements; Charge measurement; Current measurement; Degradation; Electric breakdown; Monitoring; Plasma applications; Plasma measurements; Q measurement; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1993. ICMTS 1993. Proceedings of the 1993 International Conference on
Conference_Location
Sitges
Print_ISBN
0-7803-0857-3
Type
conf
DOI
10.1109/ICMTS.1993.292878
Filename
292878
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