DocumentCode
1882145
Title
A test structure for transferring timing setup between digital IC testers
Author
Allodi, L. ; Chiorboli, G. ; Franco, G. ; Morandi, C. ; Venturi, F.
Author_Institution
Dipartimento di Ingegneria dell´´Inf., Parma Univ., Italy
fYear
1993
fDate
22-25 Mar 1993
Firstpage
223
Lastpage
226
Abstract
A test structure is designed in order to investigate an original procedure for accurately reproducing on a target automatic test equipment (ATE) for digital ICs the same timing setup used by a source ATE. The aim is to settle manufacturer/customer contestations. Implementation in a 2.4-μm CMOS technology is reported, together with preliminary experimental results
Keywords
CMOS integrated circuits; automatic test equipment; digital integrated circuits; integrated circuit testing; 2.4 micron; CMOS technology; automatic test equipment; digital IC testers; test structure; timing setup; CMOS technology; Delay lines; Digital integrated circuits; Frequency; Integrated circuit testing; Jitter; Manufacturing; Performance evaluation; Pins; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1993. ICMTS 1993. Proceedings of the 1993 International Conference on
Conference_Location
Sitges
Print_ISBN
0-7803-0857-3
Type
conf
DOI
10.1109/ICMTS.1993.292916
Filename
292916
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