DocumentCode
1889636
Title
Compressed sensing based UWB receiver: Hardware compressing and FPGA reconstruction
Author
Yang, Depeng ; Li, Husheng ; Peterson, Gregory D. ; Fathy, Aly
Author_Institution
Min Kao Dept. of Electr. Eng. & Comput. Sci., Univ. of Tennessee, Knoxville, TN
fYear
2009
fDate
18-20 March 2009
Firstpage
198
Lastpage
201
Abstract
A low sampling rate approach for recovering ultra wide band (UWB) signals is proposed, using distributed amplifiers (DAs) and low speed analog-to-digital converters (ADCs) and based on the theory of compressed sensing. A microwave circuit consisting of a bank of DAs, followed by a bank of ADCs, is designed to implement analog compressing, where the elements of measurement matrix are realized by picosecond delay tap and flexible gain coefficients in DAs. Numerical simulation shows that a bank of eight DAs and ADCs with 500MHz sampling rate can almost perfectly recover a 100ps-resolution UWB echo signal in the noiseless case. For recovering the UWB signals in a real-time way, issues in field programmable gate array (FPGA) implementation are discussed.
Keywords
analogue-digital conversion; distributed amplifiers; field programmable gate arrays; radio receivers; ultra wideband communication; FPGA reconstruction; UWB echo signal; UWB receiver; analog-to-digital converters; compressed sensing; distributed amplifiers; field programmable gate array; frequency 500 MHz; hardware compressing; microwave circuit; time 100 ps; ultra wide band signals; Analog-digital conversion; Compressed sensing; Distributed amplifiers; Field programmable gate arrays; Flexible printed circuits; Hardware; Microwave circuits; Microwave measurements; Sampling methods; Ultra wideband technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Sciences and Systems, 2009. CISS 2009. 43rd Annual Conference on
Conference_Location
Baltimore, MD
Print_ISBN
978-1-4244-2733-8
Electronic_ISBN
978-1-4244-2734-5
Type
conf
DOI
10.1109/CISS.2009.5054716
Filename
5054716
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