• DocumentCode
    1897025
  • Title

    An all-digital phase-frequency tunable clock generator for wireless OFDM communications systems

  • Author

    Yu, Jui-Yuan ; Chen, Juinn-Ting ; Yang, Mei-Hui ; Chung, Ching-Che ; Lee, Chen-Yi

  • Author_Institution
    Institution of Electronics, National Chiao Tung University, Taiwan
  • fYear
    2007
  • fDate
    26-29 Sept. 2007
  • Firstpage
    305
  • Lastpage
    308
  • Abstract
    An all-digital clock generator is designed to enable the clock phase and frequency tuning dynamically during the wireless communications system is in operation. This phase-frequency tunable clock generator (PFTCG) provides 8 clock phases for selection and enables the ADC circuits sampling signals with lower frequency and better sampling phase, resulting in lower power consumption. The PFTCG provides the frequency tuning range ±150ppm centered at 5MHz, resulting in high performance due to smaller sampling clock offset. This PFTCG is simulated under the wireless body area network system, and shows a 6.3dB SNR improvement at BER=1e−3, and the hardware is simulated with power 77.56μW in the standard process 90nm CMOS technology.
  • Keywords
    CMOS technology; Circuit optimization; Clocks; OFDM; Power generation; Sampling methods; Signal generators; Tunable circuits and devices; Tuning; Wireless communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference, 2007 IEEE International
  • Conference_Location
    Hsin Chu, Taiwan
  • Print_ISBN
    978-1-4244-1592-2
  • Electronic_ISBN
    978-1-4244-1593-9
  • Type

    conf

  • DOI
    10.1109/SOCC.2007.4545480
  • Filename
    4545480