DocumentCode
1898406
Title
Compact implementation of CCM and GCM modes of AES using DSP blocks
Author
de la Piedra, Antonio ; Touhafi, A. ; Braeken, An
Author_Institution
Dept. of Electron. & Inf., Vrije Univ. Brussel, Brussels, Belgium
fYear
2013
fDate
2-4 Sept. 2013
Firstpage
1
Lastpage
4
Abstract
In this manuscript, we have explored how the use of DSP blocks in the implementation of two authenticated-encryption modes of AES can optimize the PAR figures. Our results reflect that a 20.98 % reduction in slice utilization can be achieved at a throughput higher than 25 Mbps (12 MHz) in the Artix-7 XC7A200TL FPGA.
Keywords
cryptography; digital signal processing chips; field programmable gate arrays; AES; CCM modes; DSP blocks; FPGA; GCM modes; PAR figures; authenticated-encryption modes; Authentication; Digital signal processing; Encryption; Field programmable gate arrays; Random access memory; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location
Porto
Type
conf
DOI
10.1109/FPL.2013.6645572
Filename
6645572
Link To Document